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inline assembly problem in psim BSP/oar
- Date: Thu, 11 Feb 1999 14:41:30 -0500
- From: jskulpin at eng01.gdds.com (Jay Kulpinski)
- Subject: inline assembly problem in psim BSP/oar
joel at oarcorp.com wrote:
>
> On Thu, 11 Feb 1999, Jay Kulpinski wrote:
>
> > In trying to run the timing tests on MPC604, I discovered a problem
> > with inline assembly code borrowed from the PowerPC psim BSP.
> >
> > I haven't tried to run the timing tests under psim, but I'd guess
> > it would be a problem there, too.
>
> Thanks. Could you explain what I got wrong with the register
> specifications? I was the author of that BSP and would like to avoid
> doing it in the future. :)
>
I didn't actually disassemble the generated sequence so I don't
know exactly what it did. The symptoms were that the Cause_tm27_intr()
sequence ended up putting a 131072 (or so) into the decrementer
register, rather than a 1.
I think that if you really wanted (_clicks) to be both an input and
an output to the assembly sequence, you need to specify a constraint
of '0' in the second use to show that it's the same as the first use
(parameter #0). These assembly sequences aren't really both input and
output with respect to the parameters, so I specified only input or
output as appropriate.
Here's a excerpt from the gcc info file:
----------------------------------------------
When the constraints for the read-write operand (or the operand in
which only some of the bits are to be changed) allows a register, you
may, as an alternative, logically split its function into two separate
operands, one input operand and one write-only output operand. The
connection between them is expressed by constraints which say they need
to be in the same location when the instruction executes. You can use
the same C expression for both operands, or different expressions. For
example, here we write the (fictitious) `combine' instruction with
`bar' as its read-only source operand and `foo' as its read-write
destination:
asm ("combine %2,%0" : "=r" (foo) : "0" (foo), "g" (bar));
The constraint `"0"' for operand 1 says that it must occupy the same
location as operand 0. A digit in constraint is allowed only in an
input operand and it must refer to an output operand.
Only a digit in the constraint can guarantee that one operand will
be in the same place as another. The mere fact that `foo' is the value
of both operands is not enough to guarantee that they will be in the
same place in the generated assembler code. The following would not
work reliably:
asm ("combine %2,%0" : "=r" (foo) : "r" (foo), "g" (bar));