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mips exceptions problems
- Date: Tue, 24 Apr 2001 09:24:13 +0200
- From: Kai.Hackenstrass at barco.com (Hackenstrass, Kai)
- Subject: mips exceptions problems
try to set the bev bit in the status register to zero (SR bit 22).
this forces the exception into ram addresses, otherwise it is directed to
the rom address (default after reset and pmon).
From: mike varga [mailto:mike.varga at caveonetworks.com]
Sent: Dienstag, 24. April 2001 02:09
To: rtems users
Subject: mips exceptions problems
I am modifying the tr3904 mips bsp to be used on a Hurricane board that I
purchased. It has a QED r5231 processor.
I am trying to replace the interrupt vector that is first installed by PMON
with my own,
but continually find that the PMON's is called regardless of what I do. I
have checked the interrupt exception's memory (0x80000180) and discovered
mine is there. I have also tried to first flush the data cache and then
invalidate the instruction cache but have no success; suspecting that might
have been the problem.
The PMON vector continues to print "Interrupt Unknown".
Does anyone know what I am doing wrong?
Any help is greatly appreciated.