Why do the ARM920 based BSPs enable the MMU ?

[simon-rtems at excite.com (Simon Clubley)]

Given the single address space nature of RTEMS, why do the ARM920
based BSPs such as the CSB337 bother enabling the MMU instead of
just leaving it disabled ?

Is there some subtle aspect of ARM MMU operations that I am missing ?

The only thing that I have found is that there's a double address
space mapping of the SRAM and I'm not even sure if that's really
required.

If that (or the ability to map separate SDRAM areas into one
contiguous memory area) is not required, then is there any point in
enabling the MMU on ARM processors ?

Thanks for any information,

Simon.


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