[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
PowerPC exceptions and critical interrupts
- Date: Mon, 09 Jun 2008 15:21:52 +0200
- From: sebastian.huber at embedded-brains.de (Sebastian Huber)
- Subject: PowerPC exceptions and critical interrupts
Hi,
I adapt the gen83xx BSP for the MPC8313E currently. I switched to the
new support code (libcpu/powerpc/new-exceptions/bspsupport) and adjusted
it for e300 cores. With this framework it is possible to use RTEMS
routines and the dispatcher from external and critical exceptions (some
sophisticated lock variables are involved for this). In order too test
it I configured the interrupt controller (IPIC) in a way so that for
some interrupt sources a critical interrupt exception will be generated.
This works fine except that the current rtems_interrupt_{enable,disable}
functions are not aware of critical interrupts. This leads to race
conditions in the system core. I guess that this is also true for Book E
critical interrupts. A solution is to add the appropriate bits to the
disable mask (MSR_CE or MSR_E300_CE), but this leads to a preprecessor
or runtime cpu check orgie. Do we really need RTEMS support in critical
or machine check exceptions?
Ciao,
Sebastian
--
Sebastian Huber, Embedded Brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.huber at embedded-brains.de
PGP : Public key available on request
Diese Nachricht ist keine gesch?ftliche Mitteilung im Sinne des EHUG.