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603e Clock Issue -- Decrementer Problem
- Date: Fri, 19 Sep 2008 12:21:31 -0500
- From: joel.sherrill at OARcorp.com (Joel Sherrill)
- Subject: 603e Clock Issue -- Decrementer Problem
Thomas Doerfler wrote:
> Jennifer, Joel,
>> My Output looks like the following:
>> bsp_start (Top): Decrementer at 0xFFD4DAA1
>> bsp_start: Zero out lots of memory
>> Cpu: 0x7 Revision: 4609
>> Cpu MPC603ev
>> MSR: 0x2030
>> clockOn: Decrementer at 0xFFE5C5B7
>> clockOn: Setting decrementer to 0xA1220
>> clockOn: Decrementer at 0xFFFEF1AA
>> <<=== JOEL HERE: notice that the value read indicates that the set never
>> occurred. We have both looked at the assembly and don't see how this
>> could happen. There is a mtdec between the two prints.
> No, I think you are wrong. The second value is HIGHER than the first, so
> either the DEC has spun a whole 32 bit range (which might make sense
> only when aour console runs at 30 Bits/sec) or it has been reloaded.
Grr.. you are right. Thanks for the quick reply.
> Please observe that the printk between the two Decrementer operations
> will take a LONG time (in measures of the DEC tick rate) so it might be
> better to store the DEC values in variables and output them later.
> There had been many changes around the decrementer recently. Jennifer,
> can you check the actual opcodes generated to access the DEC? I had a
> strange problem a short time ago where the MPC8xx Timebase could not be
> read, I never came to the bottom of that problem...
> At least the shared code (libbsp/powerpc/shared/clock/*) now tests for
> various flavours of the CPU, it also checks whether we have a "e300"
> (formerly named 603LE) which has a decrementer reload feature. Maybe
> this is what you see here? On these cores, this feature can be enabled
> in one of the HID register: HID0, bit 25 is the DECAREN bit. if it is
> set, the decrementer automatically reloads after it has reached zero (it
> took 15 years until this feature was built in...)
> Maybe Sebastian can help on next week.
Jennifer's gone for the weekend apparently as well so maybe
I am reviewing the score603e IRQ code in case the interrupt
is actually happening and not getting dispatched correctly.
This board has a custom FPGA for IRQ logic and any time
something is unique to a board, it seems to be the source
Any insight is good insight.
>> Below is the compilation options on the file:
>> powerpc-rtems4.9-gcc --pipe -B../../../../.././lib/
>> -B../../../../.././score603e/lib/ -specs bsp_specs -qrtems
>> -DPACKAGE_STRING=\"rtems-c-src-lib-libcpu-powerpc\ 126.96.36.199\"
>> -DPACKAGE_BUGREPORT=\"http://www.rtems.org/bugzilla\" -I.
>> -isystem ../../../../.././score603e/lib/include -Wall
>> -Wimplicit-function-declaration -Wstrict-prototypes -Wnested-externs
>> -mcpu=603e -Dppc603e -O2 -g -fno-keep-inline-functions -MT
>> mpc6xx/clock/mpc6xx_clock_rel-c_clock.o -MD -MP -MF
>> mpc6xx/clock/.deps/mpc6xx_clock_rel-c_clock.Tpo -c -o
>> mpc6xx/clock/mpc6xx_clock_rel-c_clock.o `test -f
>> 'mpc6xx/clock/c_clock.c' || echo
>> Thanks. (from joel and jennifer)
> embedded brains GmbH
> Thomas Doerfler Obere Lagerstr. 30
> D-82178 Puchheim Germany
> Tel. : +49-89-18 90 80 79-2
> Fax : +49-89-18 90 80 79-9
> email: Thomas.Doerfler at embedded-brains.de
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Joel Sherrill, Ph.D. Director of Research & Development
joel.sherrill at OARcorp.com On-Line Applications Research
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