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MSR bits in irq_asm.S
- Date: Wed, 13 Jan 2010 14:13:40 +0100
- From: sebastian.huber at embedded-brains.de (Sebastian Huber)
- Subject: MSR bits in irq_asm.S
on PowerPC the file irq_asm.S is obsolete. Please have a look at
for the latest exception handling code.
Leon Pollak wrote:
> Hello, all.
> I passed through all PPC irq_asm.S files and seems to see the same picture:
> while exiting the IRQ state assembler code "restores" the MSR value ALWAYS in
> the constant way - without taking into account whether caches are on or off.
> Well, this is OK for some specific BSP, which initializes its cache states
> (although I should do this different).
> But this method is used in ../shared/irq_asm.S too.
> This makes me to thing, that I misunderstand something.
> Thanks for clarification...:-)
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.huber at embedded-brains.de
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