This handler encapsulates functionality which provides the foundation ISR services used in all of the APIs supported by RTEMS. More...

Collaboration diagram for ISR Handler:

Defines
#define	ISR_NUMBER_OF_VECTORS CPU_INTERRUPT_NUMBER_OF_VECTORS
	This constant promotes out the number of vectors truly supported by the current CPU being used.
#define	ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER
	This constant promotes out the highest valid interrupt vector number.
#define	_ISR_Disable_on_this_core(_level)
	Disable interrupts on this core.
#define	_ISR_Enable_on_this_core(_level)
	Enable interrupts on this core.
#define	_ISR_Flash_on_this_core(_level)
	Temporarily enable interrupts on this core.
#define	_ISR_Disable(_level) _level = _ISR_SMP_Disable();
	Enter interrupt disable critical section.
#define	_ISR_Enable(_level) _ISR_SMP_Enable( _level );
	Exits interrupt disable critical section.
#define	_ISR_Flash(_level) _ISR_SMP_Flash( _level );
	Temporarily exit interrupt disable critical section.
#define	_ISR_Install_vector(_vector, _new_handler, _old_handler) _CPU_ISR_install_vector( _vector, _new_handler, _old_handler )
	Install interrupt handler vector.
#define	_ISR_Get_level() _CPU_ISR_Get_level()
	Return current interrupt level.
#define	_ISR_Set_level(_new_level)
	Set current interrupt level.
#define	_ISR_Is_in_progress() (_ISR_Nest_level != 0)
	Checks if an ISR in progress.
Typedefs
typedef uint32_t	ISR_Vector_number
	The following type defines the type used to manage the vectors.
typedef void	ISR_Handler
	Return type for ISR Handler.
typedef ISR_Handler(*	ISR_Handler_entry )(ISR_Vector_number)
	Pointer to an ISR Handler.
typedef uint32_t	ISR_Level
	The following type defines the control block used to manage the interrupt level portion of the status register.
Functions
void	_ISR_Handler_initialization (void)
	Initialize the ISR handler.
void	_ISR_SMP_Initialize (void)
	Initialize SMP interrupt critical section support.
ISR_Level	_ISR_SMP_Disable (void)
	Enter interrupt critical section on SMP system.
void	_ISR_SMP_Enable (ISR_Level level)
	Exit interrupt critical section on SMP system.
void	_ISR_SMP_Flash (ISR_Level level)
	Temporarily exit interrupt critical section on SMP system.
int	_ISR_SMP_Enter (void)
	Enter SMP interrupt code.
int	_ISR_SMP_Exit (void)
	Exit SMP interrupt code.
void	_ISR_Handler (void)
	ISR interrupt dispatcher.
void	_ISR_Dispatch (void)
	ISR wrapper for thread dispatcher.
RTEMS_INLINE_ROUTINE bool	_ISR_Is_vector_number_valid (uint32_t vector)
	This function returns true if the vector is a valid vector number for this processor and false otherwise.
RTEMS_INLINE_ROUTINE bool	_ISR_Is_valid_user_handler (void *handler)
	This function returns true if handler is the entry point of a valid use interrupt service routine and false otherwise.
Variables
SCORE_EXTERN ISR_Handler_entry *	_ISR_Vector_table
	The following declares the Vector Table.

Detailed Description

This handler encapsulates functionality which provides the foundation ISR services used in all of the APIs supported by RTEMS.

The ISR Nest level counter variable is maintained as part of the per cpu data structure.

Define Documentation

#define _ISR_Disable ( _level ) _level = _ISR_SMP_Disable();

Enter interrupt disable critical section.

This routine enters an interrupt disable critical section. When in an SMP configuration, this involves obtaining a spinlock to ensure that only one core is inside an interrupt disable critical section. When on a single core system, this only involves disabling local CPU interrupts.

Return values:

The	argument _level will contain the previous interrupt mask level.

Referenced by _ASR_Swap_signals(), and _ASR_Post_signals().

#define _ISR_Disable_on_this_core ( _level )

Value:

do { \
    _CPU_ISR_Disable( _level ); \
    RTEMS_COMPILER_MEMORY_BARRIER(); \
  } while (0)

Disable interrupts on this core.

This routine disables all interrupts so that a critical section of code can be executing without being interrupted.

Return values:

The	argument _level will contain the previous interrupt mask level.

#define _ISR_Enable ( _level ) _ISR_SMP_Enable( _level );

Exits interrupt disable critical section.

This routine exits an interrupt disable critical section. When in an SMP configuration, this involves releasing a spinlock. When on a single core system, this only involves disabling local CPU interrupts.

Return values:

The	argument _level will contain the previous interrupt mask level.

Referenced by _ASR_Swap_signals(), _ASR_Post_signals(), _CORE_mutex_Seize_interrupt_trylock_body(), and _CORE_semaphore_Seize_isr_disable().

#define _ISR_Enable_on_this_core ( _level )

Value:

do { \
    RTEMS_COMPILER_MEMORY_BARRIER(); \
    _CPU_ISR_Enable( _level ); \
  } while (0)

Enable interrupts on this core.

This routine enables interrupts to the previous interrupt mask LEVEL. It is used at the end of a critical section of code to enable interrupts so they can be processed again.

Parameters:

[in] _level contains the interrupt level mask level previously returned by _ISR_Disable_on_this_core.

#define _ISR_Flash ( _level ) _ISR_SMP_Flash( _level );

Temporarily exit interrupt disable critical section.

This routine is used to temporarily enable interrupts during a long critical section. It is used in long sections of critical code when a point is reached at which interrupts can be temporarily enabled. Deciding where to flash interrupts in a long critical section is often difficult and the point must be selected with care to ensure that the critical section properly protects itself.

Return values:

The	argument _level will contain the previous interrupt mask level.

#define _ISR_Flash_on_this_core ( _level )

Value:

do { \
    RTEMS_COMPILER_MEMORY_BARRIER(); \
    _CPU_ISR_Flash( _level ); \
    RTEMS_COMPILER_MEMORY_BARRIER(); \
  } while (0)

Temporarily enable interrupts on this core.

This routine temporarily enables interrupts to the previous interrupt mask level and then disables all interrupts so that the caller can continue into the second part of a critical section.

This routine is used to temporarily enable interrupts during a long critical section. It is used in long sections of critical code when a point is reached at which interrupts can be temporarily enabled. Deciding where to flash interrupts in a long critical section is often difficult and the point must be selected with care to ensure that the critical section properly protects itself.

Parameters:

[in] _level contains the interrupt level mask level previously returned by _ISR_Disable_on_this_core.

#define _ISR_Get_level ( ) _CPU_ISR_Get_level()

Return current interrupt level.

This routine returns the current interrupt level.

LM32 Specific Information: XXX document implementation including references if appropriate

Return values:

This	method returns the current level.

#define _ISR_Install_vector	(	_vector,
		_new_handler,
		_old_handler
	)	_CPU_ISR_install_vector( _vector, _new_handler, _old_handler )

Install interrupt handler vector.

This routine installs new_handler as the interrupt service routine for the specified vector. The previous interrupt service routine is returned as old_handler.

LM32 Specific Information: XXX document implementation including references if appropriate

Parameters:

[in]	_vector	is the vector number
[in]	_new_handler	is ISR handler to install
[in]	_old_handler	is a pointer to a variable which will be set to the old handler

Return values:

*_old_handler will be set to the old ISR handler

#define _ISR_Is_in_progress ( ) (_ISR_Nest_level != 0)

Checks if an ISR in progress.

This function returns true if the processor is currently servicing and interrupt and false otherwise. A return value of true indicates that the caller is an interrupt service routine, NOT a thread.

Return values:

This	methods returns true when called from an ISR.

#define _ISR_Set_level ( _new_level )

Value:

do { \
    RTEMS_COMPILER_MEMORY_BARRIER();  \
    _CPU_ISR_Set_level( _new_level ); \
    RTEMS_COMPILER_MEMORY_BARRIER();  \
  } while (0)

Set current interrupt level.

This routine sets the current interrupt level to that specified by _new_level. The new interrupt level is effective when the routine exits.

Parameters:

[in] _new_level contains the desired interrupt level.

Referenced by _Modes_Set_interrupt_level().

#define ISR_NUMBER_OF_VECTORS CPU_INTERRUPT_NUMBER_OF_VECTORS

This constant promotes out the number of vectors truly supported by the current CPU being used.

This is usually the number of distinct vectors the cpu can vector.

Function Documentation

void _ISR_Dispatch ( void )

ISR wrapper for thread dispatcher.

This routine provides a wrapper so that the routine _Thread_Dispatch can be invoked when a reschedule is necessary at the end of the outermost interrupt service routine. This wrapper is necessary to establish the processor context needed by _Thread_Dispatch and to save the processor context which is corrupted by _Thread_Dispatch. This context typically consists of registers which are not preserved across routine invocations.

Note:: Typically mplemented in assembly language.

void _ISR_Handler ( void )

ISR interrupt dispatcher.

This routine is the interrupt dispatcher. ALL interrupts are vectored to this routine so that minimal context can be saved and setup performed before the application's high-level language interrupt service routine is invoked. After the application's interrupt service routine returns control to this routine, it will determine if a thread dispatch is necessary. If so, it will ensure that the necessary thread scheduling operations are performed when the outermost interrupt service routine exits.

Note:: Typically implemented in assembly language.

void _ISR_Handler_initialization ( void )

Initialize the ISR handler.

This routine performs the initialization necessary for the ISR handler.

ISR_Level _ISR_SMP_Disable ( void )

Enter interrupt critical section on SMP system.

This method is used to enter an interrupt critical section that is honored across all cores in an SMP system.

Return values:

This	method returns the previous interrupt mask level.

void _ISR_SMP_Enable ( ISR_Level level )

Exit interrupt critical section on SMP system.

This method is used to exit an interrupt critical section that is honored across all cores in an SMP system.

Parameters:

[in] level contains the interrupt level mask level previously returned by _ISR_SMP_Disable.

int _ISR_SMP_Enter ( void )

Enter SMP interrupt code.

This method is used to enter the SMP interrupt section.

Return values:

This	method returns the isr level.

int _ISR_SMP_Exit ( void )

Exit SMP interrupt code.

This method is used to exit the SMP interrupt.

Return values:

This	method returns 0 on a simple return and returns 1 on a dispatching return.

void _ISR_SMP_Flash ( ISR_Level level )

Temporarily exit interrupt critical section on SMP system.

This method is used to temporarily exit an interrupt critical section that is honored across all cores in an SMP system.

Parameters:

[in] level contains the interrupt level mask level previously returned by _ISR_SMP_Disable.

void _ISR_SMP_Initialize ( void )

Initialize SMP interrupt critical section support.

This method initializes the variables required by the SMP implementation of interrupt critical section management.

Variable Documentation

SCORE_EXTERN ISR_Handler_entry* _ISR_Vector_table

The following declares the Vector Table.

Application interrupt service routines are vectored by the ISR Handler via this table.

Defines

Typedefs

Functions

Variables

Detailed Description

Define Documentation

Function Documentation

Variable Documentation