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RTEMS CPU Kit with SuperCore
4.10.99.0
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00001 00008 /* 00009 * Modified by Doug McBride, Colorado Space Grant College 00010 * 00011 * Format taken partly from RTEMS code and mostly from Motorola IDP user's 00012 * manual. RTEMS copyright information below. 00013 * 00014 * COPYRIGHT (c) 1989-2011. 00015 * On-Line Applications Research Corporation (OAR). 00016 * 00017 * The license and distribution terms for this file may be 00018 * found in the file LICENSE in this distribution or at 00019 * http://www.rtems.com/license/LICENSE. 00020 */ 00021 00022 #ifndef _RTEMS_MOTOROLA_MC68230_H 00023 #define _RTEMS_MOTOROLA_MC68230_H 00024 00025 /* Some Motorola IDP User manual defines: */ 00026 #define MC68230_PIT_ADDR 0x00c01003 /* base address of the PIT */ 00027 #define MC68230_REGOFF 0x04 /* Difference between addresses */ 00028 #define MC68230_VECT 64 00029 #define MC68230_H1VECT 0x00 00030 #define MC68230_H2VECT 0x01 00031 #define MC68230_H3VECT 0x02 00032 #define MC68230_H4VECT 0x03 00033 00034 /* 00035 * mc68230 register offsets 00036 */ 00037 #define MC68230_PGCR 0x00 00038 #define MC68230_PSRR 1*MC68230_REGOFF 00039 #define MC68230_PADDR 2*MC68230_REGOFF 00040 #define MC68230_PBDDR 3*MC68230_REGOFF 00041 #define MC68230_PCDDR 4*MC68230_REGOFF 00042 #define MC68230_PIVR 5*MC68230_REGOFF 00043 #define MC68230_PACR 6*MC68230_REGOFF 00044 #define MC68230_PBCR 7*MC68230_REGOFF 00045 #define MC68230_PADR 8*MC68230_REGOFF 00046 #define MC68230_PBDR 9*MC68230_REGOFF 00047 #define MC68230_PAAR 10*MC68230_REGOFF 00048 #define MC68230_PBAR 11*MC68230_REGOFF 00049 #define MC68230_PCDR 12*MC68230_REGOFF 00050 #define MC68230_PITSR 13*MC68230_REGOFF 00051 #define MC68230_TCR 16*MC68230_REGOFF 00052 #define MC68230_TIVR 17*MC68230_REGOFF 00053 #define MC68230_CPRH 19*MC68230_REGOFF 00054 #define MC68230_CPRM 20*MC68230_REGOFF 00055 #define MC68230_CPRL 21*MC68230_REGOFF 00056 #define MC68230_CNTRH 23*MC68230_REGOFF 00057 #define MC68230_CNTRM 24*MC68230_REGOFF 00058 #define MC68230_CNTRL 25*MC68230_REGOFF 00059 #define MC68230_TSR 26*MC68230_REGOFF 00060 00061 /* Some RTEMS style defines: */ 00062 #ifndef MC68230_VOL8 00063 #define MC68230_VOL8( ptr ) ((volatile uint8_t *)(ptr)) 00064 #endif 00065 00066 #define MC68230_WRITE( reg, data ) \ 00067 *(MC68230_VOL8(MC68230_PIT_ADDR+reg)) = (data) 00068 00069 #define MC68230_READ( reg, data ) \ 00070 (data) = *(MC68230_VOL8(MC68230_PIT_ADDR+reg)) 00071 00072 #endif
1.7.5